Integrated circuit packaging technology has seen an increase in the number of integrated circuits mounted on a single circuit board or substrate. The new packaging designs are more compact form factors, such as the physical size and shape of a packaged integrated circuit, and providing a significant increase in overall integrated circuit density.
However, integrated circuit density continues to be limited by the “real estate” available for mounting individual integrated circuits on a substrate. Even larger form factor systems, such as personal computers (PC's), compute servers, and storage servers, need more integrated circuits in the same or smaller “real estate”. The needs for portable personal electronics, such as cell phones, digital cameras, music players, personal digital assistants (PDA's), and location-based devices are particularly acute and have further driven the need for increased integrated circuit density.
This increased integrated circuit density has led to the development of multi-chip packages in which more than one integrated circuit can be packaged. For example, package-on-package (POP) systems may be used to integrate and package stacks of circuits. A POP system may be manufactured from a top assembly and a bottom assembly where each assembly carries at least one integrated circuit.
However, in some cases, the bottom assembly may warp before or after the top assembly has been mounted. This may result in poor yields, device failures, or reduced device lifetimes due to a variety of problems such as compromised mechanical properties or poor electrical connectivity. Contemporary electronics expose integrated circuits, integrated circuit packages, and electronic subassemblies to more demanding and sometimes harsh environmental conditions, such as cold, heat, and humidity requiring integrated circuit packages to provide robust mechanical structures. The range of operating conditions may also cause warpage resulting in failure, field returns, and increased cost.
In some cases an underfill encapsulant material is applied in the gap directly between an integrated circuit (IC) chip stack and the bottom package carrier of the bottom assembly. This underfill encapsulation protects and covers the connections between the IC and the bottom package carrier.
Thus, a need still remains for a stacked integrated circuit package system that provides a low cost manufacturing, improved yield, and improved reliability. In view of the ever-increasing need to save costs and improve efficiencies, it is more and more critical that answers be found to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.